PCIe M.2 — Key B Pinout
M.2 Key B is a 75-position Socket 2 connector used for cellular and WWAN modules, SATA storage, and PCIe peripherals. Depending on the host, it can expose up to two PCIe lanes, SATA, USB 2.0, USB 3.x, a UIM/SIM interface, and platform-control signals.
Compatibility warning: Key B describes the connector shape and pin map, not the interfaces actually wired by the host. A card that fits mechanically may still be electrically incompatible. Always check both the host and module documentation.
Connector overview
| Property | Value |
|---|---|
| Connector family | PCI Express M.2 / NGFF, Socket 2 |
| Key notch | Key B, positions 12 to 19 |
| Contacts | 75 positions; 67 electrical contacts with the Key B notch |
| Main use | WWAN/cellular modems, GNSS modules, SATA SSDs, and PCIe peripherals |
| Possible host interfaces | PCIe x1/x2, SATA, USB 2.0, USB 3.x, UIM/SIM, SMBus |
| Main supply | 3.3 V; selected module types may use VBAT-capable supply contacts |
A B+M-keyed storage module can often fit both Key B and Key M sockets. Mechanical fit does not guarantee that SATA or PCIe is wired, and a B+M PCIe module is normally limited to two lanes.
Pinout diagram
Top side — odd pins
Bottom side — even pins
Pin assignment table
Signal names use the host/platform perspective: PET is transmitted by the host toward the module, while PER is received by the host from the module. Several contacts have alternate functions selected according to the module type and host implementation.
Color key: Power · Ground · USB · PCIe / SATA · Management · Radio / platform control
Top side
| Pin | Signal | Function |
|---|---|---|
| 1 | CONFIG_3 | Module-type configuration strap |
| 3 / 5 | GND | Ground |
| 7 / 9 | USB_D+ / USB_D− | USB 2.0 data pair |
| 11 | GND | Ground |
| 12–19 | — | Mechanical Key B notch; no contacts |
| 21 | CONFIG_0 | Module-type configuration strap |
| 23 | GPIO_11 | General-purpose platform signal |
| 25 | DPR | Dynamic power-reduction control |
| 27 | GND | Ground |
| 29 / 31 | PERn1 / PERp1 or USB3-Rx− / USB3-Rx+ | PCIe lane 1 host receive pair or USB SuperSpeed receive pair; SSIC is another legacy assignment |
| 33 | GND | Ground |
| 35 / 37 | PETn1 / PETp1 or USB3-Tx− / USB3-Tx+ | PCIe lane 1 host transmit pair or USB SuperSpeed transmit pair; SSIC is another legacy assignment |
| 39 | GND | Ground |
| 41 / 43 | PERn0 / PERp0 or SATA-B+ / SATA-B− | PCIe lane 0 host receive pair or SATA host receive pair |
| 45 | GND | Ground |
| 47 / 49 | PETn0 / PETp0 or SATA-A− / SATA-A+ | PCIe lane 0 host transmit pair or SATA host transmit pair |
| 51 | GND | Ground |
| 53 / 55 | REFCLKn / REFCLKp | PCIe differential reference clock |
| 57 | GND | Ground |
| 59 / 61 / 63 / 65 | ANTCTL0 / ANTCTL1 / ANTCTL2 / ANTCTL3 | Antenna-tuner control signals |
| 67 | RESET# | Module reset |
| 69 | CONFIG_1 | Module-type configuration strap |
| 71 / 73 | GND | Ground |
| 75 | CONFIG_2 | Module-type configuration strap |
Bottom side
| Pin | Signal | Function |
|---|---|---|
| 2 / 4 | 3.3 V | Main module supply |
| 6 | FULL_CARD_POWER_OFF# | Full-module power-disable control |
| 8 | W_DISABLE1# | Disable radio function 1 |
| 10 | GPIO_9 / DAS/DSS / LED_1# | General-purpose, storage activity, staggered spin-up, or activity-LED function |
| 12–19 | — | Mechanical Key B notch; no contacts |
| 20 / 22 / 24 | GPIO_5 / GPIO_6 / GPIO_7 | General-purpose platform signals |
| 26 | GPIO_10 / W_DISABLE2# | General-purpose signal or disable radio function 2 |
| 28 | GPIO_8 | General-purpose platform signal |
| 30 | UIM_RESET | UIM/SIM reset |
| 32 | UIM_CLK | UIM/SIM clock |
| 34 | UIM_DATA | UIM/SIM bidirectional data |
| 36 | UIM_PWR | UIM/SIM supply provided by the module |
| 38 | DEVSLP | SATA device-sleep control |
| 40 | GPIO_0 / SMB_CLK | General-purpose signal or SMBus clock |
| 42 | GPIO_1 / SMB_DATA | General-purpose signal or SMBus data |
| 44 | GPIO_2 / ALERT# | General-purpose signal or management-bus alert |
| 46 / 48 | GPIO_3 / GPIO_4 | General-purpose platform signals |
| 50 | PERST# | PCIe fundamental reset |
| 52 | CLKREQ# | PCIe reference-clock request |
| 54 | PEWAKE# | PCIe wake request |
| 56 / 58 | Reserved / no connect | Leave unconnected unless the applicable specification defines them |
| 60 | COEX3 | Wireless-coexistence control |
| 62 | COEX_TXD | Wireless-coexistence transmit |
| 64 | COEX_RXD | Wireless-coexistence receive |
| 66 | SIM_DETECT | UIM/SIM-card presence detection |
| 68 | SUSCLK | Optional 32 kHz suspend clock |
| 70 / 72 / 74 | 3.3 V / VBAT | Module supply; VBAT use depends on the module type and platform |
Signal groups
| Group | Pins | Notes |
|---|---|---|
| Power and ground | 2, 4, 70, 72, 74 and all GND pins | 3.3 V main supply, optional VBAT use, and ground returns |
| USB 2.0 | 7, 9 | One USB 2.0 link, commonly used by cellular and WWAN modules |
| PCIe lane 0 / SATA | 41, 43, 47, 49 | Shared differential pairs; the host selects PCIe or SATA operation |
| PCIe lane 1 / USB 3.x | 29, 31, 35, 37 | Shared differential pairs for a second PCIe lane or USB SuperSpeed |
| PCIe clock and control | 50, 52–55 | Reset, clock request, wake, and 100 MHz reference clock |
| UIM/SIM | 30, 32, 34, 36, 66 | SIM reset, clock, data, supply, and detection |
| Management / GPIO | 20, 22–26, 28, 40, 42, 44, 46, 48 | Platform GPIO and optional SMBus functions |
| Radio and antenna control | 6, 8, 59–65 | Module power, radio disable, antenna tuning, and coexistence |
| Configuration | 1, 21, 69, 75 | Straps used by the host to identify the module configuration |
PCIe lane 0 and SATA share contacts, while PCIe lane 1 and USB SuperSpeed share another group. These alternate interfaces cannot be used simultaneously on the same contacts.
Electrical specifications
| Interface | Design value / requirement |
|---|---|
| Main power | Nominal 3.3 V on the specified supply contacts; confirm whether the module requires a VBAT implementation |
| PCIe pairs | 85 Ω differential nominal; place AC-coupling capacitors on each transmitter as required by PCIe |
| PCIe reference clock | 100 MHz differential clock when the common-clock architecture is used |
| SATA pairs | 100 Ω differential nominal |
| USB 2.0 pair | 90 Ω differential nominal |
| USB SuperSpeed pairs | 90 Ω differential nominal |
| UIM/SIM interface | Voltage is supplied by the module and depends on the SIM/UIM implementation |
| Management and control I/O | Signal levels may be 1.8 V or 3.3 V; verify every function in both datasheets |
| Active-low signals | Names ending in # are asserted low |
Keep every high-speed pair short, impedance-controlled, and routed over a continuous reference plane. Match the two traces within each pair and avoid vias, stubs, plane gaps, and unnecessary layer changes.
Connector orientation
- The diagrams show the module contact edge, not the socket solder pads.
- The top/component side carries odd-numbered pins; the bottom side carries even-numbered pins.
- Pin 1 is at the end opposite pin 75. The Key B notch replaces positions 12–19, near pin 1.
- A socket footprint may appear mirrored compared with the module. Follow the connector manufacturer’s recommended PCB footprint.
Common wiring configurations
Cellular or WWAN modem
- Connect 3.3 V, all required grounds, USB 2.0 and/or the PCIe interface supported by the module.
- Route the UIM/SIM signals to an appropriate SIM socket and follow the module vendor’s ESD and placement guidance.
- Implement FULL_CARD_POWER_OFF#, RESET#, W_DISABLE#, antenna-control, and wake signals only at their specified logic levels.
PCIe x2 peripheral or SSD
- Route both PCIe lane groups, REFCLK, PERST#, CLKREQ#, and PEWAKE# as required by the platform.
- Do not use USB SuperSpeed on the lane-1 contacts at the same time.
SATA M.2 SSD
- Use the SATA alternate functions on pins 41, 43, 47, and 49.
- Implement DEVSLP and the CONFIG straps as required by the host and drive.
- Confirm that the socket supports SATA; many Key B sockets intended for WWAN expose USB and PCIe instead.
Common mistakes
- Assuming that every Key B socket supports PCIe, SATA, USB, and a SIM card simultaneously.
- Plugging a B+M storage module into a WWAN-only socket and expecting it to operate.
- Treating the module dimensions, such as 2242 or 3042, as an interface identifier.
- Using PCIe lane 1 and USB SuperSpeed simultaneously on their shared contacts.
- Swapping PET and PER or SATA A and B because signal names are read from the wrong perspective.
- Mirroring the footprint or confusing top-side and bottom-side contact numbers.
- Driving 1.8 V control or UIM/SIM signals with 3.3 V without checking tolerance.
- Ignoring modem peak-current, antenna, RF-keepout, and thermal requirements.
Related connectors
| Connector | Typical use | Compatibility note |
|---|---|---|
| M.2 Key M | NVMe PCIe x4 and SATA storage | A B+M storage module may fit, but Key M-only modules do not fit a Key B socket |
| M.2 Key A / A+E | Wireless connectivity | Different notch and signal assignment; not directly interchangeable |
| Mini PCI Express | Older cellular and wireless modules | Different 52-pin connector and pinout; an active adapter may be required |
| mSATA | Older SATA SSDs | Electrically SATA-based but mechanically and electrically different from M.2 |
All PCIe M.2 pinout pages
Compatibility guide · Key A · Key A+E · Key B · Key B+A · Key B+E · Key B+M · Key E · Key M
Official specifications
- PCI Express M.2 specification overview — PCI-SIG
- PCI Express specifications — PCI-SIG
- USB specifications and documents — USB-IF
- Serial ATA specifications — SATA-IO
FAQ
Is every Key B socket intended for a cellular modem?
No. Key B is common for WWAN modules, but it can also support SATA storage or PCIe peripherals. The host determines which interfaces are wired.
Can a B+M-keyed SSD be installed in a Key B socket?
It can usually fit mechanically. It will operate only if the socket and SSD share SATA or PCIe support, and the host firmware supports the device.
Does Key B provide PCIe x2?
The pinout makes two lanes possible, but a host may wire one lane or none. One lane group is also shared with USB SuperSpeed.
Is the SIM interface always available?
No. The UIM/SIM contacts may be unused, and the SIM socket may be absent or routed differently by the host platform.
Is the connector hot-pluggable?
Do not assume it is. Power down the platform before inserting or removing a module unless the equipment documentation explicitly supports hot plugging.