Differential Pair & XTALK Calculator
Size six coupled geometries, compare odd and even modes, and estimate near-end crosstalk from edge rate and parallel run length.
Geometry and stack-up
Nominal oz/ft² values. For an outer layer, use the finished post-plating thickness supplied by the fabricator.
Geometry cross-section
Modal relationships
Calculated impedances
XTALK / NEXT estimate
Terminated coupled-line model: NEXT grows with parallel run length until 2 × flight time approximately reaches the signal rise time.
Quasi-static pre-design estimate. Transitions, vias, losses, solder mask, roughness, asymmetries and FEXT are not solved. Confirm the stack-up with the fabricator and use a field solver for fast interfaces or tight margins.
Signal-integrity guide
Size a differential pair and interpret XTALK
A differential pair is more than two 50 Ω traces. Coupling creates even and odd modes, and the odd mode sets differential impedance. The same coupling also determines crosstalk between the conductors.
Method and assumptions
The tool first calculates isolated-trace impedance with the quasi-static model matching the stack-up. Coupling corrections provide Zodd and Zeven, with Zdiff = 2·Zodd and Zcommon = Zeven/2. The modal impedances produce Kb. The terminated NEXT estimate is then scaled by the ratio of twice the coupled-zone flight time to signal rise time.
Inputs to verify
Symmetric-stripline H
In this mode, H is the total distance between both reference planes. The traces are centred between those planes, and copper thickness T is included in H.
S is edge-to-edge clearance
For edge-coupled geometries, measure S between copper edges, not centre lines. For broadside coupling, S is the vertical dielectric clearance between facing copper surfaces.
Rise time, not bit rate
Crosstalk is driven by edge rate. Use the driver’s 10–90% rise time or an IBIS-derived value; data rate alone does not describe the high-frequency content.
Actual parallel run length
Enter only the length over which both traces remain parallel in the same electromagnetic environment. Analyse transitions and layer changes separately.
Recommended workflow
- 1Choose the geometry and enter pressed stack-up dimensions plus finished copper thickness.
- 2Tune W and S to place Zdiff inside the interface window, then inspect Zodd and coupling sensitivity.
- 3Evaluate NEXT with the fastest edge, then have impedance and critical structures confirmed by the fabricator or a solver.
Why coupled length matters
Two traces retain the same modal impedance regardless of length, but a short segment produces less NEXT while twice its flight time remains below the rise time. Once saturation length is reached, extending the ideal segment no longer raises the model’s peak.
What this XTALK calculation does not cover
The NEXT result covers coupling between two uniform, correctly terminated conductors. It does not solve pair-to-pair coupling, FEXT in inhomogeneous microstrip, discontinuities, P/N imbalance, mode conversion, loss, or resonances. Those cases require RLGC matrices, S-parameters, or a 2D/3D solver.
Frequently asked questions
Is Zdiff always twice 50 Ω?
No. Two isolated 50 Ω traces approach 100 Ω when far apart. Bringing them closer lowers Zodd, so Zdiff = 2·Zodd falls below 100 Ω unless width or stack-up is adjusted.
Is broadside routing better than edge coupling?
Not generally. Broadside routing can save width but is sensitive to layer registration and often creates asymmetric P/N vias. Edge coupling on one layer is usually simpler to manufacture and verify.
Why is FEXT not displayed?
FEXT depends on the velocity difference between even and odd modes. It is nearly zero in homogeneous stripline but depends strongly on fields in air, solder mask, and dielectric for microstrip. A credible value requires a modal solver rather than a generic coefficient.
References to consult
- IPC-2141A, Design Guide for High-Speed Controlled Impedance Circuit Boards, sections on microstrip and coupled lines.
- B. C. Wadell, Transmission Line Design Handbook, Artech House, coupled-line models.
- S. C. Thierauf, High-Speed Circuit Board Signal Integrity, Artech House, even/odd-mode and crosstalk analysis.
Original educational content, reviewed for technical clarity on 14 September 2026. Always verify datasheets, applicable standards, and your design before power-up or manufacture.