PCB trace resistance and voltage drop
Calculate a trace’s resistance, voltage drop and Joule loss from its length, width, copper thickness, current and temperature.
Written and technically reviewed byElectroDesignForge Engineering Team
View the editorial process📖 Definition
A PCB trace is a conductor with a finite resistance. When current flows, that resistance causes a voltage drop and Joule heating. Both depend on the trace length, width, finished copper thickness and operating temperature.
The three checks to make
For a straight copper trace carrying DC or low-frequency RMS current, start with these relations:
R = ρ × L / (w × t)
ΔV = I × R
P = I² × R
| Symbol | Meaning | Use consistent SI units |
|---|---|---|
ρ | Copper resistivity at the operating temperature | Ω·m |
L | Electrical path length | m |
w | Finished trace width | m |
t | Finished copper thickness | m |
I | Continuous DC current, or RMS current for resistive heating | A |
The cross-sectional area is w × t. Doubling either width or copper thickness approximately halves the DC resistance, voltage drop and resistive power loss when all other conditions remain unchanged.
Use the PCB track width calculator to calculate these values from a practical board geometry and to make a first temperature-rise estimate.
Copper resistance rises with temperature
Annealed copper is about 1.724 × 10⁻⁸ Ω·m at 20 °C. Its resistance increases by approximately 0.393% for every degree Celsius above that reference:
ρT = ρ20 × [1 + 0.00393 × (T − 20 °C)]
This feedback matters on power paths: more current raises the trace temperature, then the warmer copper raises the voltage drop and dissipation. A room-temperature resistance calculation is therefore only a first estimate when the trace is expected to run hot.
The temperature to use is the conductor temperature, not just the ambient. It includes self-heating, nearby heat sources, airflow, copper planes and the board stack-up.
Worked example: 1 A on a short 1 oz trace
Consider an external trace with the following finished geometry:
| Parameter | Value |
|---|---|
| Length | 100 mm |
| Width | 1.0 mm |
| Finished copper thickness | 35 µm (about 1 oz/ft²) |
| Current | 1.0 A |
| Copper temperature | 20 °C |
Its area is 1.0 mm × 0.035 mm = 0.035 mm², or 3.5 × 10⁻⁸ m². The approximate resistance is then:
R = 1.724 × 10⁻⁸ × 0.100 / (3.5 × 10⁻⁸) ≈ 0.049 Ω
ΔV ≈ 1.0 × 0.049 = 49 mV
P ≈ 1.0² × 0.049 = 49 mW
At 2 A, the voltage drop doubles to about 98 mV while the power loss rises fourfold to about 196 mW. This square-law increase is why a trace that looks acceptable at nominal current can become a hot, high-drop path at peak load.
Geometry is only part of the current path
The simple formula describes a uniform, straight section. In a real board, also check the narrowest or thinnest element in the full current loop:
- Neck-downs at pads, connectors or thermal relief spokes.
- Vias, including drill diameter, finished plating thickness, quantity and current sharing.
- Copper pours and planes, where current crowding can concentrate losses near a connection.
- Fuses, shunts, connectors and the return path; the delivered load voltage depends on the complete loop resistance.
- Outer-layer plating: use finished copper thickness rather than the starting foil when that is what the fabricator specifies.
For a two-conductor DC supply, calculate the positive and return paths together. A 50 mΩ outgoing trace and a 50 mΩ return trace produce a 100 mΩ loop resistance and therefore twice the one-way voltage drop.
Design method
- Define the worst sustained current and the maximum acceptable drop at the load.
- Enter the actual length, finished copper thickness and available width in the PCB track width calculator.
- Check both voltage drop and power loss at the expected operating temperature, not just at 20 °C.
- Inspect every neck-down, via transition, connector and return path separately.
- Compare the resulting temperature rise with the board’s allowed temperature and the fabricator’s minimum-width rules.
The calculator uses IPC-2221-style current/temperature-rise relations as a first-pass estimate. For a critical power path, validate the final layout with IPC-2152 guidance, the fabricator’s stack-up and design rules, thermal analysis or measurement on representative hardware.
Common mistakes
| Mistake | Why it causes trouble | Better approach |
|---|---|---|
| Using copper weight as a guarantee of finished thickness | Outer-layer plating and fabrication tolerances change the conductor section | Obtain finished copper values from the board stack-up |
| Checking only the main trace | A short neck-down or one via can dominate resistance and heating | Trace the complete electrical path and its bottlenecks |
| Calculating at room temperature only | Copper resistance increases as the trace warms | Include a realistic conductor temperature or iterate after thermal estimation |
| Ignoring the return path | Load voltage depends on loop resistance | Budget outgoing and return conductors together |
| Treating DC equations as an RF model | Skin effect, proximity effect and impedance dominate at high frequency | Use an appropriate AC or controlled-impedance analysis |
Bibliography
- IPC-2152 — Standard for Determining Current Carrying Capacity in Printed Board Design.
- IPC-2221C — Generic Standard on Printed Board Design.
- NIST — electrical resistivity and temperature coefficient reference data for copper.