ElectroDesignForgeElectroDesignForge

Components / Capacitors

Capacitor Derating Curves

Plot DC-bias and temperature retention curves, then estimate minimum effective capacitance at the selected operating point.

Datasheet-anchored model. The starting values are illustrative. Replace each loss input with data for the exact manufacturer part number; dielectric labels alone do not define a DC-bias curve.

Capacitor and curve anchors

%
%

Use the capacitance loss read from the part's DC-bias graph at rated voltage. The tool smoothly interpolates from 0 V to this anchor.

Voltage operating point

V
V

Temperature curve and operating point

°C
°C
°C
%
°C
%

Enter conservative capacitance losses at the temperature limits. The reference-temperature retention is fixed at 100% before initial tolerance.

Ceff,min=CN⋅Ftol⋅Fbias⋅FTC_{eff,min} = C_N \cdot F_{tol} \cdot F_{bias} \cdot F_T
Fbias=1−Lbias(V)F_{bias} = 1 - L_{bias}(V)
FT=1−LT(T)F_T = 1 - L_T(T)

Calculated operating point

Estimated minimum effective capacitance

6.593 µF
Nominal capacitance10 µF
After −tolerance80 %
DC-bias retention89.1 %
Temperature retention92.5 %
Combined retention65.9 %
Total estimated loss34.1 %
Voltage headroom68.8 %
Nearest temperature limit40 °C

The estimate multiplies the initial lower-tolerance factor by the two interpolated retention factors. Real voltage and temperature effects may interact, so a combined manufacturer curve or measured data takes precedence.

DC bias · 0 to 100% of rated voltage

Capacitance versus DC bias

Indicative interpolation from zero bias to the loss entered at rated voltage.

0%25%50%75%100%5 V · 89.1%0 V8 V16 V

Temperature range

Capacitance versus temperature

Piecewise interpolation through the cold, reference and hot temperature anchors.

0%25%50%75%100%85 °C · 92.5%-55 °C25 °C125 °C

Component guide

Build a realistic effective-capacitance budget

The value printed on a capacitor is not necessarily the capacitance available in circuit. Initial tolerance, DC bias, and temperature can reduce effective capacitance, especially for Class 2 MLCCs.

Method and assumptions

The tool builds two conservative interpolations from datasheet points: voltage-driven loss at rated voltage and losses at the temperature limits. At the selected point it multiplies the lower-tolerance factor by the voltage and temperature retention factors. Multiplication avoids applying both losses to the nominal base twice, but remains an approximation unless the manufacturer supplies a combined curve.

Inputs to verify

Curves for the exact part number

Use DC-bias and temperature plots for the exact capacitance, voltage, package, and dielectric being ordered. Two X7R parts with the same nominal value can behave very differently.

Real component conditions

Voltage must account for the DC level and allowed transients. Temperature should represent the component body, including ambient, self-heating, and nearby heat sources.

Recommended workflow

  1. 1Read negative tolerance and capacitance losses from the exact part's manufacturer curves.
  2. 2Enter the DC voltage, temperature, and limits the capacitor will actually encounter.
  3. 3Compare minimum effective capacitance with the circuit requirement, then separately verify voltage, ripple, ESR, lifetime, and transients.

Worked example

For 10 µF with −20% tolerance, 65% bias retention, and 92% temperature retention, the minimum estimate is 10 × 0.80 × 0.65 × 0.92 = 4.78 µF. Voltage headroom alone therefore does not remove capacitance loss.

What the curves do not guarantee

Interpolation predicts neither lifetime nor failure probability and does not replace manufacturer data. It excludes Class 2 ceramic ageing, measurement frequency, ESR, ripple current, mechanical stress, surge voltage, and voltage-temperature interactions.

Frequently asked questions

Is the X7R code enough to estimate DC-bias loss?

No. X7R mainly bounds temperature variation over a stated range. Bias loss depends strongly on formulation, capacitance, package, dielectric thickness, and voltage rating.

Can I add every percentage loss?

Not without defining each percentage base. The tool multiplies independent retention factors. If the datasheet provides a curve measured with voltage and temperature combined, use that data directly instead of recombining effects.

References to consult

  • TDK guides covering MLCC DC-bias effect and capacitance-temperature characteristics.
  • Murata ceramic-capacitor fundamentals and part-specific characterization sheets.

Original educational content, reviewed for technical clarity on 11 September 2026. Always verify datasheets, applicable standards, and your design before power-up or manufacture.