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PCB Track Width Calculator

Calculate a recommended copper track width and estimate its electrical and thermal performance using the IPC-2221 method.

PCB Cross-Section

CALCULATED TRACK WIDTHCopperEXTERNAL LAYER

Equations

I=k ΔT0.44A0.725I=k\,\Delta T^{0.44}A^{0.725}
W=AtW=\dfrac{A}{t}
R=ρTLWtR=\rho_T\dfrac{L}{Wt}
V=IRP=I2RV=IR\quad P=I^2R

Input Parameters

Calculated Values

Recommended Track Width for 10°C Rise
0.302 mm
Equivalent Resistance
50.7993 mΩ
Voltage Drop
0.0508 V
Power Loss
0.0508 W
Temperature Rise
1.4 °C
Total Temperature
26.4 °C

Calculation reference: IPC-2221. For detailed thermal design, see the newer IPC-2152.

PCB guide

Size a PCB trace with care

Trace width is a trade-off between current, temperature rise, copper thickness, voltage drop, fabrication, and clearance constraints. The calculation is a starting point, not production validation.

Method and assumptions

The tool estimates the required conductor cross-section from current, copper thickness, and allowable temperature rise. Voltage drop and thermal distribution must then be checked on the actual stack-up.

Inputs to verify

DC or RMS current

Use the sustained worst-case current, not merely the nominal average of a pulsed system.

Copper and layers

Distinguish outer/inner layers and use finished copper thickness, including plating where relevant.

Recommended workflow

  1. 1Determine maximum current, ambient temperature, and acceptable temperature rise.
  2. 2Calculate an initial width, then check resistance and voltage drop over the real length.
  3. 3Validate critical areas against the fabricator’s rules and, when needed, with thermal analysis or testing.

Decision example

For a 1 A supply on 35 µm copper, compare the calculated width with trace length and available copper plane. A short, wide trace tied to a plane does not behave like a long isolated trace.

Limits to keep in mind

The model does not replace IPC-2152 or thermal testing. It does not cover transients, vias, copper balance, clearance constraints, or high-frequency requirements.

Frequently asked questions

Is a wider trace always better?

It often reduces resistance, but it can conflict with controlled impedance, spacing, fabrication, or local heat flow. Width must fit the context.

Do vias limit current?

Yes. A layer change can become the hot spot; check drill size, plating, via count, and path length.

References to consult

  • Method references: IPC-2152, IPC-2221, and the PCB fabricator’s design rules.

Original educational content, reviewed for technical clarity on 20 August 2026. Always verify datasheets, applicable standards, and your design before power-up or manufacture.